Michael Schaffner

Publications

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The linked pdf's are all preliminary. The final versions are available at IEEE Xplore.

Dissertation

Energy-Efficient VLSI Architectures for Real-Time and 3D Video Processing.
Michael Stefano Fritz Schaffner Dissertation. ETH Zürich. 2017. No. 24261. (pdf, bib)

Journal Papers

Towards Edge-Aware Spatio-Temporal Filtering in Real-Time.
M. Schaffner, F. Scheidegger, L. Cavigelli, H. Kaeslin, L. Benini and A. Smolic. Accepted for publication in Trans. on Image Processing (TIP), 2017. (preprint)

Design and Evaluation of a Low-Power Sensor Device for Induced Rockfall Experiments.
A. Caviezel, M. Schaffner, L. Cavigelli, Y. Buehler, P. Bartelt, M. Magno, L. Benini. Accepted for publication in Trans. on Instrumentation and Measurement, 2017. (preprint)

An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster.
Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini. IEEE Journal of Solid-State Circuits, 52(1):98-112, 2017. (pdf, bib)

Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion using IDW.
Michael Schaffner, Frank K. Gürkaynak, Pierre Greisen, Hubert Kaeslin, Luca Benini, Aljosa Smolic. IEEE Transactions on Circuits and Systems for Video Technology, 26(11):2093-2108, 2016. (pdf, bib)

Analysis and VLSI Implementation of EWA Rendering for Real-Time HD Video Applications.
Pierre Greisen, Michael Schaffner, Simon Heinzle, Marian Runo, Aljosa Smolic, Andreas Burg, Hubert Kaeslin, Markus Gross. IEEE Transactions on Circuits and Systems for Video Technology, 22(11):1577-1589, 2012. (pdf, bib)

Book Chapters

A Complete Real-Time Feature Extraction and Matching System Based on Semantic Kernels Binarized.
Michael Schaffner, Pascal A. Hager, Lukas Cavigelli, Zhou Fang, Frank K. Gürkaynak, Pierre Greisen, Aljoscha Smolic, Hubert Kaeslin, Luca Benini. VLSI-SoC: At the Crossroads of Emerging Trends,, IFIP Advances in Information and Communication Technology. Springer Berlin Heidelberg, 2015. (bib)

Spatially-Varying Image Warping: Evaluations and VLSI Implementations.
Pierre Greisen, Michael Schaffner, Danny Luu, Mikos Val, Simon Heinzle, Frank Gürkaynak. VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, volume 418 of IFIP Advances in Information and Communication Technology, pages 64-87. Springer Berlin Heidelberg, 2013. (bib)

Conference Proceedings

Impact of Temporal Subsampling on Accuracy and Performance in Practical Video Classification.
F. Scheidegger, L. Cavigelli, M. Schaffner, A. C. I. Malossi, C. Bekas, L. Benini. roc. of the European Signal Processing Conference (EUSIPCO) , Kos, Greece, 2017. (pdf)

StoneNode: A Low-Power Sensor Device for Induced Rockfall Experiments.
P. Niklaus, T. Birchler, T. Aebi, M. Schaffner, L. Cavigelli, A. Caviezel, M. Magno, L. Benini. Proc. of the Sensors Applications Symposium (SAS) , Glassboro, USA, 2017. (pdf, bib)

Accuracy and Performance Trade-offs of Logarithmic Number Units in Multi-Core Clusters.
Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini. 23rd IEEE Symposium on Computer Arithmetic (ARITH 2016) , Santa Clara, USA, 2016. (pdf, bib)

High-Efficiency Logarithmic Number Unit Design based on an Improved Cotransformation Scheme.
Youri Popoff, Florian Scheidegger, Michael Schaffner, Michael Gautschi, Frank K. Gürkaynak, Luca Benini. Proceedings of DATE , Dresden, 2016. (pdf, bib)

A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V Shared Logarithmic Floating Point Unit for Acceleration of Nonlinear Function Kernels in a Tightly Coupled Processor Cluster.
Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini. Proceedings of ISSCC , San Francisco, 2016. (pdf, bib)

Automatic Multiview Synthesis - Towards a Mobile System on a Chip.
Michael Schaffner, Frank K. Gürkaynak, Hubert Kaeslin, Luca Benini, Aljoscha Smolic. Proceedings of VCIP 2015 , Singapore, 2015. (pdf, bib)

DRAM or no-DRAM? Exploring Linear Solver Architectures for Image Domain Warping in 28 nm CMOS.
Michael Schaffner, Frank K. Gürkaynak, Aljoscha Smolic, Luca Benini. Proceedings of DATE 2015 , Grenoble, France, 2015. (pdf, bib)

An Approximate Computing Technique for Reducing the Complexity of a Direct-Solver for Sparse Linear Systems in Real-Time Video Processing.
Michael Schaffner, Frank K. Gürkaynak, Aljoscha Smolic, Hubert Kaeslin, Luca Benini. Proceedings of the Design Automation Conference (DAC) , San Francisco, USA, 2014. (pdf, bib)

MADmax: A 1080p Stereo-to-Multiview Rendering ASIC in 65 nm CMOS based on Image Domain Warping.
Michael Schaffner, Pierre Greisen, Simon Heinzle, Frank K. Gürkaynak, Hubert Kaeslin, Aljoscha Smolic. Proceedings of the European Solid-State Circuits Conference (ESSCIRC) , Bucharest, Romania, 2013. (pdf, bib)

A Real-Time 720p Feature Extraction Core Based on Semantic Kernels Binarized.
Michael Schaffner, Pascal Hager, Lukas Cavigelli, Pierre Greisen, Frank K. Gürkaynak, Hubert Kaeslin. Proceedings of the International Conference on Very Large Scale Integration (VLSI-SoC) , Istanbul, Turkey, 2013. (pdf, bib)

Efficient image resampling for multiview displays.
Michael Schaffner, Pierre Greisen, Simon Heinzle, Aljoscha Smolic. Proceedings of the International Conference on Acoustics, Speech, and Signal Processing (ICASSP) , Vancouver, Canada 2013. (pdf, bib)

A General-Transformation EWA View Rendering Engine for 1080p Video in 130nm CMOS.
Pierre Greisen, Richard Emler, Michael Schaffner, Simon Heinzle, Frank Gürkaynak. IFIP/IEEE 20th International Conference on Very Large Scale Integration (VLSI-SoC 2012), Santa Cruz, USA, 2012. (pdf, bib)

Demonstrations

Automatic Multiview Synthesis - Prototype Demo.
Michael Schaffner, Frank K. Gürkaynak, Hubert Kaeslin, Luca Benini, Aljoscha Smolic. Proceedings of VCIP 2015 , Singapore, 2015. (pdf, bib)

last update: September 26 2017 10:11:39.

Links:

ETH Zürich (ETHZ)
Disney Research Zurich (DRZ)
Integrated Systems Laboratory (IIS)
Microelectronics Design Center (DZ)
IIS Chipgallery