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-- Copyright: 2010 Integrated Sytems Laboratory, ETH Zurich
--            http://www.iis.ee.ethz.ch/~sha3
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library ieee;
use ieee.numeric_std.all;
use ieee.std_logic_1164.all;

entity f2 is

  port (
    MxDI     : in  std_logic_vector(511 downto 0);
    QaxDI    : in  std_logic_vector(511 downto 0);
    QbxDI    : in  std_logic_vector(511 downto 0);
    HxDO     : out std_logic_vector(511 downto 0));

end f2;

architecture rtl of f2 is

  signal XlxD : std_logic_vector(31 downto 0);
  signal XhxD : std_logic_vector(31 downto 0);
  signal HxD : std_logic_vector(511 downto 0);
 
begin  -- rtl

XlxD(31 downto 0) <= QbxDI(511 downto 480) xor QbxDI(479 downto 448) xor QbxDI(447 downto 416) xor QbxDI(415 downto 384) xor QbxDI(383 downto 352) xor QbxDI(351 downto 320) xor QbxDI(319 downto 288) xor QbxDI(287 downto 256);

XhxD(31 downto 0) <= XlxD(31 downto 0) xor QbxDI(255 downto 224)  xor QbxDI(223 downto 192)  xor QbxDI(191 downto 160)  xor QbxDI(159 downto 128)  xor QbxDI(127 downto 96)  xor QbxDI(95 downto 64)  xor QbxDI(63 downto 32)  xor QbxDI(31 downto 0);



HxDO <= HxD;


HxD(511 downto 480) <= std_logic_vector(unsigned(std_logic_vector(unsigned(XhxD(31 downto 0)) sll 5) xor std_logic_vector(unsigned(QbxDI(511 downto 480)) srl 5) xor MxDI(511 downto 480)) + unsigned(XlxD(31 downto 0) xor QbxDI(255 downto 224) xor QaxDI(511 downto 480)));
HxD(479 downto 448) <= std_logic_vector(unsigned(std_logic_vector(unsigned(XhxD(31 downto 0)) srl 7) xor std_logic_vector(unsigned(QbxDI(479 downto 448)) sll 8) xor MxDI(479 downto 448)) + unsigned(XlxD(31 downto 0) xor QbxDI(223 downto 192) xor QaxDI(479 downto 448)));
HxD(447 downto 416) <= std_logic_vector(unsigned(std_logic_vector(unsigned(XhxD(31 downto 0)) srl 5) xor std_logic_vector(unsigned(QbxDI(447 downto 416)) sll 5) xor MxDI(447 downto 416)) + unsigned(XlxD(31 downto 0) xor QbxDI(191 downto 160) xor QaxDI(447 downto 416)));
HxD(415 downto 384) <= std_logic_vector(unsigned(std_logic_vector(unsigned(XhxD(31 downto 0)) srl 1) xor std_logic_vector(unsigned(QbxDI(415 downto 384)) sll 5) xor MxDI(415 downto 384)) + unsigned(XlxD(31 downto 0) xor QbxDI(159 downto 128) xor QaxDI(415 downto 384)));

HxD(383 downto 352) <= std_logic_vector(unsigned(std_logic_vector(unsigned(XhxD(31 downto 0)) srl 3) xor QbxDI(383 downto 352) xor MxDI(383 downto 352)) + unsigned(XlxD(31 downto 0) xor QbxDI(127 downto 96) xor QaxDI(383 downto 352)));

HxD(351 downto 320) <= std_logic_vector(unsigned(std_logic_vector(unsigned(XhxD(31 downto 0)) sll 6) xor std_logic_vector(unsigned(QbxDI(351 downto 320)) srl 6) xor MxDI(351 downto 320)) + unsigned(XlxD(31 downto 0) xor QbxDI(95 downto 64) xor QaxDI(351 downto 320)));
HxD(319 downto 288) <= std_logic_vector(unsigned(std_logic_vector(unsigned(XhxD(31 downto 0)) srl 4) xor std_logic_vector(unsigned(QbxDI(319 downto 288)) sll 6) xor MxDI(319 downto 288)) + unsigned(XlxD(31 downto 0) xor QbxDI(63 downto 32) xor QaxDI(319 downto 288)));
HxD(287 downto 256) <= std_logic_vector(unsigned(std_logic_vector(unsigned(XhxD(31 downto 0)) srl 11) xor std_logic_vector(unsigned(QbxDI(287 downto 256)) sll 2) xor MxDI(287 downto 256)) + unsigned(XlxD(31 downto 0) xor QbxDI(31 downto 0) xor QaxDI(287 downto 256)));









HxD(255 downto 224) <= std_logic_vector((unsigned(HxD(383 downto 352)) rol 9) + unsigned(XhxD(31 downto 0) xor QbxDI(255 downto 224) xor MxDI(255 downto 224)) + unsigned(std_logic_vector(unsigned(XlxD(31 downto 0)) sll 8) xor QbxDI(287 downto 256) xor QaxDI(255 downto 224)));
HxD(223 downto 192) <= std_logic_vector((unsigned(HxD(351 downto 320)) rol 10) + unsigned(XhxD(31 downto 0) xor QbxDI(223 downto 192) xor MxDI(223 downto 192)) + unsigned(std_logic_vector(unsigned(XlxD(31 downto 0)) srl 6) xor QbxDI(511 downto 480) xor QaxDI(223 downto 192)));
HxD(191 downto 160) <= std_logic_vector((unsigned(HxD(319 downto 288)) rol 11) + unsigned(XhxD(31 downto 0) xor QbxDI(191 downto 160) xor MxDI(191 downto 160)) + unsigned(std_logic_vector(unsigned(XlxD(31 downto 0)) sll 6) xor QbxDI(479 downto 448) xor QaxDI(191 downto 160)));
HxD(159 downto 128) <= std_logic_vector((unsigned(HxD(287 downto 256)) rol 12) + unsigned(XhxD(31 downto 0) xor QbxDI(159 downto 128) xor MxDI(159 downto 128)) + unsigned(std_logic_vector(unsigned(XlxD(31 downto 0)) sll 4) xor QbxDI(447 downto 416) xor QaxDI(159 downto 128)));
HxD(127 downto 96) <= std_logic_vector((unsigned(HxD(511 downto 480)) rol 13) + unsigned(XhxD(31 downto 0) xor QbxDI(127 downto 96) xor MxDI(127 downto 96)) + unsigned(std_logic_vector(unsigned(XlxD(31 downto 0)) srl 3) xor QbxDI(415 downto 384) xor QaxDI(127 downto 96)));
HxD(95 downto 64) <= std_logic_vector((unsigned(HxD(479 downto 448)) rol 14) + unsigned(XhxD(31 downto 0) xor QbxDI(95 downto 64) xor MxDI(95 downto 64)) + unsigned(std_logic_vector(unsigned(XlxD(31 downto 0)) srl 4) xor QbxDI(383 downto 352) xor QaxDI(95 downto 64)));
HxD(63 downto 32) <= std_logic_vector((unsigned(HxD(447 downto 416)) rol 15) + unsigned(XhxD(31 downto 0) xor QbxDI(63 downto 32) xor MxDI(63 downto 32)) + unsigned(std_logic_vector(unsigned(XlxD(31 downto 0)) srl 7) xor QbxDI(351 downto 320) xor QaxDI(63 downto 32)));
HxD(31 downto 0) <= std_logic_vector((unsigned(HxD(415 downto 384)) rol 16) + unsigned(XhxD(31 downto 0) xor QbxDI(31 downto 0) xor MxDI(31 downto 0)) + unsigned(std_logic_vector(unsigned(XlxD(31 downto 0)) srl 2) xor QbxDI(319 downto 288) xor QaxDI(31 downto 0)));

end rtl;

--  cxor b
--  exor d
--  



Generated on Fri Sep 24 10:39:12 CEST 2010
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