#
# FirstEncounter(TM) Clock Synthesis Technology File Format
#
#
# This is an example file, adapt it for your design !!!
#
# IMPORTANT: Existing buffers/inverters on the clock network(s) are NOT automatically
# removed during clock tree synthesis, so to get a nicely balanced tree you should
# do this manually by running the command "deleteClockTree -all".
# To remove an already inserted tree, "changeClockStatus -all -noFixedBuffers"
# has to be run beforehand, otherwise the buffers can not be removed as they have
# the status "FIXED".
#
#-- MacroModel --
#MacroModel pin
#-- Special Route Type --
#RouteTypeName specialRoute
#TopPreferredLayer 4
#BottomPreferredLayer 3
#PreferredExtraSpace 1
#End
#-- Regular Route Type --
#RouteTypeName regularRoute
#TopPreferredLayer 4
#BottomPreferredLayer 3
#PreferredExtraSpace 1
#End
#-- Clock Group --
#ClkGroup
#+
#-- Nanoroute follows CTS route guide (for RouteClkNet YES) --
#UseCTSRouteGuide YES
#------------------------------------------------------------
# clock tree (tight constraints)
#
# For (very) small trees "MaxFanout" might be useful to get
# some more buffers and reduce the impact of (clock tree)
# routing.
#
# For the best results (but worse overall routability) the clock
# net can be routed during CTS ("RouteClkNet YES"). To get an
# optimally balanced routing also set "UseCTSRouteGuide YES".
#------------------------------------------------------------
AutoCTSRootPin ClkxCI
#Period 10ns
MaxDelay 1ns
MinDelay 0ns
MaxSkew 250ps
SinkMaxTran 350ps
BufMaxTran 250ps
Buffer CKBUFM1W CKBUFM2W CKBUFM3W CKBUFM4W CKBUFM6W CKBUFM8W CKBUFM12W CKBUFM16W CKBUFM20W CKBUFM22WA CKBUFM24W CKBUFM26WA CKBUFM32W CKBUFM40W CKBUFM48W CKINVM1W CKINVM2W CKINVM3W CKINVM4W CKINVM6W CKINVM8W CKINVM12W CKINVM16W CKINVM20W CKINVM22WA CKINVM24W CKINVM26WA CKINVM32W CKINVM40W CKINVM48W
#MaxFanout 32
#AddDriverCell CKBUFM12W
NoGating NO
DetailReport NO
#SetDPinAsSync NO
#SetIoPinAsSync NO
RouteClkNet YES
PostOpt YES
OptAddBuffer YES
#RouteType specialRoute
#LeafRouteType regularRoute
ThroughPin
END