------------------------------------------------------------
-- Copyright: 2011 George Mason University, Virginia USA
--            http://www.iis.ee.ethz.ch/~sha3
------------------------------------------------------------
-- =====================================================================

-- Copyright © 2010-2011 by Cryptographic Engineering Research Group (CERG),

-- ECE Department, George Mason University

-- Fairfax, VA, U.S.A.

-- =====================================================================


library ieee;
use ieee.std_logic_1164.all;   
use ieee.numeric_std.all;
use work.sha3_pkg.all;

-- modular multiplication in GF(2^8) with irreducible polynomial x^8 + x^4 + x^3 + x + 1

-- implementation of multiplication by constants from the set {1, 2, 3, 4, 5, 6, 7}


-- kgf - 2011-09-28 - separated entities and architectures


entity aes_mulx07 is
generic (cons 	:integer := 3);
port( 
	input 		: in std_logic_vector(AES_SBOX_SIZE-1 downto 0);
    output 		: out std_logic_vector(AES_SBOX_SIZE-1 downto 0));
end aes_mulx07;
  
architecture rtl of aes_mulx07 is

begin

	output(7) <= input(5) xor input(6) xor input(7);
	output(6) <= input(4) xor input(5) xor input(6);
	output(5) <= input(3) xor input(4) xor input(5) xor input(7);
	output(4) <= input(2) xor input(3) xor input(4) xor input(6);
	output(3) <= input(1) xor input(2) xor input(3) xor input(6) xor input(7);
	output(2) <= input(0) xor input(1) xor input(2) xor input(7);
	output(1) <= input(0) xor input(1) xor input(6);
	output(0) <= input(0) xor input(6) xor input(7);
		
end architecture rtl;