------------------------------------------------------------ -- Copyright: 2011 George Mason University, Virginia USA -- http://www.iis.ee.ethz.ch/~sha3 ------------------------------------------------------------ -- ===================================================================== -- Copyright © 2010-2011 by Cryptographic Engineering Research Group (CERG), -- ECE Department, George Mason University -- Fairfax, VA, U.S.A. -- ===================================================================== library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; use ieee.std_logic_unsigned.all; use work.sha3_pkg.all; use work.groestl_pkg.all; -- possible generics values: hs = {GROESTL_DATA_SIZE_SMALL, GROESTL_DATA_SIZE_BIG} -- rom_style = {DISTRIBUTED, COMBINATIONAL} -- all combinations are allowed entity groestl_pq is generic (n:integer := GROESTL_DATA_SIZE_SMALL; rom_style : integer := DISTRIBUTED); port( clk : in std_logic; rst : in std_logic; p_mode : in std_logic; round : in std_logic_vector(7 downto 0); input : in std_logic_vector(n-1 downto 0); output : out std_logic_vector(n-1 downto 0)); end groestl_pq; architecture round3_pipelined of groestl_pq is signal after_subbyte : std_logic_vector(n-1 downto 0); signal addcons : std_logic_vector(n-1 downto 0); signal after_reg : std_logic_vector(n-1 downto 0); signal after_shiftrow : std_logic_vector(n-1 downto 0); signal after_srp : std_logic_vector(n-1 downto 0); signal after_srq : std_logic_vector(n-1 downto 0); constant zero : std_logic_vector(n-1 downto 0):=(others=>'0'); begin gen256: if n=GROESTL_DATA_SIZE_SMALL generate addcons(511 downto 504) <= (input(511 downto 504) xor round xor x"00") when p_mode ='1' else (not input(511 downto 504)); addcons(503 downto 456) <= input(503 downto 456) when p_mode ='1' else (not input(503 downto 456)); addcons(455 downto 448) <= input(455 downto 448) when p_mode ='1' else (x"ff" xor input(455 downto 448) xor round); addcons(447 downto 440) <= (input(447 downto 440) xor round xor x"10") when p_mode ='1' else (not input(447 downto 440)); addcons(439 downto 392) <= input(439 downto 392) when p_mode ='1'else (not input(439 downto 392)); addcons(391 downto 384) <= input(391 downto 384) when p_mode ='1' else (x"ef" xor input(391 downto 384) xor round); addcons(383 downto 376) <= (input(383 downto 376) xor round xor x"20") when p_mode ='1' else (not input(383 downto 376)); addcons(375 downto 328) <= input(375 downto 328) when p_mode ='1' else(not input(375 downto 328)); addcons(327 downto 320) <= input(327 downto 320) when p_mode ='1' else (x"df" xor input(327 downto 320) xor round); addcons(319 downto 312) <= (input(319 downto 312) xor round xor x"30") when p_mode ='1' else (not input(319 downto 312)); addcons(311 downto 264) <= input(311 downto 264) when p_mode ='1' else(not input(311 downto 264)); addcons(263 downto 256) <= input(263 downto 256) when p_mode ='1' else (x"cf" xor input(263 downto 256) xor round); addcons(255 downto 248) <= (input(255 downto 248) xor round xor x"40") when p_mode ='1' else (not input(255 downto 248)); addcons(247 downto 200) <= input(247 downto 200) when p_mode ='1'else (not input(247 downto 200)); addcons(199 downto 192) <= input(199 downto 192) when p_mode ='1' else (x"bf" xor input(199 downto 192) xor round); addcons(191 downto 184) <= (input(191 downto 184) xor round xor x"50") when p_mode ='1' else (not input(191 downto 184)); addcons(183 downto 136) <= input(183 downto 136) when p_mode ='1'else (not input(183 downto 136)); addcons(135 downto 128) <= input(135 downto 128) when p_mode ='1' else (x"af" xor input(135 downto 128) xor round); addcons(127 downto 120) <= (input(127 downto 120) xor round xor x"60") when p_mode ='1' else (not input(127 downto 120)); addcons(119 downto 72) <= input(119 downto 72) when p_mode ='1'else (not input(119 downto 72)); addcons(71 downto 64) <= input(71 downto 64) when p_mode ='1' else (x"9f" xor input(71 downto 64) xor round); addcons(63 downto 56) <= (input(63 downto 56) xor round xor x"70") when p_mode ='1' else (not input(63 downto 56)); addcons(55 downto 8) <= input(55 downto 8) when p_mode ='1'else (not input(55 downto 8)); addcons(7 downto 0) <= input(7 downto 0) when p_mode ='1' else (x"8f" xor input(7 downto 0) xor round); end generate; gen512: if n=GROESTL_DATA_SIZE_BIG generate addcons(1023 downto 1016) <= (input(1023 downto 1016) xor round xor x"00") when p_mode ='1' else (not input(1023 downto 1016)); addcons(1015 downto 968) <= input(1015 downto 968) when p_mode ='1'else (not input(1015 downto 968)); addcons(967 downto 960) <= input(967 downto 960) when p_mode ='1' else (x"ff" xor input(967 downto 960) xor round); addcons(959 downto 952) <= (input(959 downto 952) xor round xor x"10") when p_mode ='1' else (not input(959 downto 952)); addcons(951 downto 904) <= input(951 downto 904) when p_mode ='1'else (not input(951 downto 904)); addcons(903 downto 896) <= input(903 downto 896) when p_mode ='1' else (x"ef" xor input(903 downto 896) xor round); addcons(895 downto 888) <= (input(895 downto 888) xor round xor x"20") when p_mode ='1' else (not input(895 downto 888)); addcons(887 downto 840) <= input(887 downto 840) when p_mode ='1'else (not input(887 downto 840)); addcons(839 downto 832) <= input(839 downto 832) when p_mode ='1' else (x"df" xor input(839 downto 832) xor round); addcons(831 downto 824) <= (input(831 downto 824) xor round xor x"30") when p_mode ='1' else (not input(831 downto 824)); addcons(823 downto 776) <= input(823 downto 776) when p_mode ='1'else (not input(823 downto 776)); addcons(775 downto 768) <= input(775 downto 768) when p_mode ='1' else (x"cf" xor input(775 downto 768) xor round); addcons(767 downto 760) <= (input(767 downto 760) xor round xor x"40") when p_mode ='1' else (not input(767 downto 760)); addcons(759 downto 712) <= input(759 downto 712) when p_mode ='1'else (not input(759 downto 712)); addcons(711 downto 704) <= input(711 downto 704) when p_mode ='1' else (x"bf" xor input(711 downto 704) xor round); addcons(703 downto 696) <= (input(703 downto 696) xor round xor x"50") when p_mode ='1' else (not input(703 downto 696)); addcons(695 downto 648) <= input(695 downto 648) when p_mode ='1'else (not input(695 downto 648)); addcons(647 downto 640) <= input(647 downto 640) when p_mode ='1' else (x"af" xor input(647 downto 640) xor round); addcons(639 downto 632) <= (input(639 downto 632) xor round xor x"60") when p_mode ='1' else (not input(639 downto 632)); addcons(631 downto 584) <= input(631 downto 584) when p_mode ='1'else (not input(631 downto 584)); addcons(583 downto 576) <= input(583 downto 576) when p_mode ='1' else (x"9f" xor input(583 downto 576) xor round); addcons(575 downto 568) <= (input(575 downto 568) xor round xor x"70") when p_mode ='1' else (not input(575 downto 568)); addcons(567 downto 520) <= input(567 downto 520) when p_mode ='1'else (not input(567 downto 520)); addcons(519 downto 512) <= input(519 downto 512) when p_mode ='1' else (x"8f" xor input(519 downto 512) xor round); addcons(511 downto 504) <= (input(511 downto 504) xor round xor x"80") when p_mode ='1' else (not input(511 downto 504)); addcons(503 downto 456) <= input(503 downto 456) when p_mode ='1'else (not input(503 downto 456)); addcons(455 downto 448) <= input(455 downto 448) when p_mode ='1' else (x"7f" xor input(455 downto 448) xor round); addcons(447 downto 440) <= (input(447 downto 440) xor round xor x"90") when p_mode ='1' else (not input(447 downto 440)); addcons(439 downto 392) <= input(439 downto 392) when p_mode ='1'else (not input(439 downto 392)); addcons(391 downto 384) <= input(391 downto 384) when p_mode ='1' else (x"6f" xor input(391 downto 384) xor round); addcons(383 downto 376) <= (input(383 downto 376) xor round xor x"a0") when p_mode ='1' else (not input(383 downto 376)); addcons(375 downto 328) <= input(375 downto 328) when p_mode ='1'else (not input(375 downto 328)); addcons(327 downto 320) <= input(327 downto 320) when p_mode ='1' else (x"5f" xor input(327 downto 320) xor round); addcons(319 downto 312) <= (input(319 downto 312) xor round xor x"b0") when p_mode ='1' else (not input(319 downto 312)); addcons(311 downto 264) <= input(311 downto 264) when p_mode ='1'else (not input(311 downto 264)); addcons(263 downto 256) <= input(263 downto 256) when p_mode ='1' else (x"4f" xor input(263 downto 256) xor round); addcons(255 downto 248) <= (input(255 downto 248) xor round xor x"c0") when p_mode ='1' else (not input(255 downto 248)); addcons(247 downto 200) <= input(247 downto 200) when p_mode ='1'else (not input(247 downto 200)); addcons(199 downto 192) <= input(199 downto 192) when p_mode ='1' else (x"3f" xor input(199 downto 192) xor round); addcons(191 downto 184) <= (input(191 downto 184) xor round xor x"d0") when p_mode ='1' else (not input(191 downto 184)); addcons(183 downto 136) <= input(183 downto 136) when p_mode ='1'else (not input(183 downto 136)); addcons(135 downto 128) <= input(135 downto 128) when p_mode ='1' else (x"2f" xor input(135 downto 128) xor round); addcons(127 downto 120) <= (input(127 downto 120) xor round xor x"e0") when p_mode ='1' else (not input(127 downto 120)); addcons(119 downto 72) <= input(119 downto 72) when p_mode ='1'else (not input(119 downto 72)); addcons(71 downto 64) <= input(71 downto 64) when p_mode ='1' else (x"1f" xor input(71 downto 64) xor round); addcons(63 downto 56) <= (input(63 downto 56) xor round xor x"f0") when p_mode ='1' else (not input(63 downto 56)); addcons(55 downto 8) <= input(55 downto 8) when p_mode ='1'else (not input(55 downto 8)); addcons(7 downto 0) <= input(7 downto 0) when p_mode ='1' else (x"0f" xor input(7 downto 0) xor round); end generate; sbox_gen: for i in 0 to n/AES_SBOX_SIZE - 1 generate sbox : aes_sbox generic map (rom_style=>rom_style) port map ( input=>addcons(AES_SBOX_SIZE*i + 7 downto AES_SBOX_SIZE*i), output=>after_subbyte(AES_SBOX_SIZE*i+7 downto AES_SBOX_SIZE*i)); end generate; pl_reg : regna generic map (n=>n, init=>zero) port map (clk=>clk, rst=>rst, en=>VCC, input=>after_subbyte, output=>after_reg); -- kgf - 2011-09-28 - changed the instantiation to two separate entities, and -- not two architectures of the same entity srp :entity work.groestl_shiftrowp(rtl) generic map (n=>n)port map (input=>after_reg, output=>after_srp); srq :entity work.groestl_shiftrowq(rtl) generic map (n=>n)port map (input=>after_reg, output=>after_srq); after_shiftrow <= after_srp when p_mode='0' else after_srq; mc256: if n=GROESTL_DATA_SIZE_SMALL generate mc : entity work.groestl_mixbytes(groestl_mixbytes) port map (input=>after_shiftrow, output=>output); end generate; mc512: if n=GROESTL_DATA_SIZE_BIG generate mc_left : entity work.groestl_mixbytes(groestl_mixbytes) port map (input=>after_shiftrow(1023 downto 512), output=>output(1023 downto 512)); mc_right : entity work.groestl_mixbytes(groestl_mixbytes) port map (input=>after_shiftrow(511 downto 0), output=>output(511 downto 0)); end generate; end round3_pipelined;