#! /bin/tcsh -f

############################################################
## Copyright: 2010 Integrated Sytems Laboratory, ETH Zurich
##            http://www.iis.ee.ethz.ch/~sha3
############################################################

# Example script for compiling RTL sourcecode

set VER=6.5a
set LIB=rtl


if (-e $LIB) then
  rm -rf $LIB 
endif

vlib-${VER} $LIB

# compile sourcecode
vcom-${VER}  -work $LIB -check_synthesis ../sourcecode/subbytes_groestl.vhd
vcom-${VER}  -work $LIB -check_synthesis ../sourcecode/gf4map_2.vhd
vcom-${VER}  -work $LIB -check_synthesis ../sourcecode/gf4sqr_2.vhd
vcom-${VER}  -work $LIB -check_synthesis ../sourcecode/gf4inv_2.vhd
vcom-${VER}  -work $LIB -check_synthesis ../sourcecode/gf4mult_2.vhd
vcom-${VER}  -work $LIB -check_synthesis ../sourcecode/gf4imapaffine_2.vhd
vcom-${VER}  -work $LIB -check_synthesis ../sourcecode/fsm.vhd
vcom-${VER}  -work $LIB -check_synthesis ../sourcecode/groestl_comb.vhd
#vcom-${VER}  -work $LIB -check_synthesis ../sourcecode/groestl_lut.vhd


# testbench (note no -check_synthesis)
vcom-${VER}  -work $LIB ../sourcecode/simulstuff.vhd
vcom-${VER}  -work $LIB ../sourcecode/groestltbpkg.vhd
vcom-${VER}  -work $LIB ../sourcecode/groestltb.vhd


vmake-${VER}  rtl > Makefile

# use a command like 
#
#   vsim-${VER} -lib rtl aes_multi_tb
#
# to simulate