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-- Copyright: 2010 Integrated Sytems Laboratory, ETH Zurich
--            http://www.iis.ee.ethz.ch/~sha3
------------------------------------------------------------
library ieee;
use ieee.numeric_std.all;
use ieee.std_logic_1164.all;
use work.hamsipkg.all;

entity expansion is

  port (
    DINxDI : in data;
    D1xDO : out std_logic_vector(31 downto 0);
    D2xDO : out std_logic_vector(31 downto 0);
    D3xDO : out std_logic_vector(31 downto 0);
    D4xDO : out std_logic_vector(31 downto 0);
    D5xDO : out std_logic_vector(31 downto 0);
    D6xDO : out std_logic_vector(31 downto 0);
    D7xDO : out std_logic_vector(31 downto 0);
    D8xDO : out std_logic_vector(31 downto 0));
end expansion;

architecture rtl of expansion is
  
  
begin  -- rtl

  -- Expansion and Concatenation
  -----------------------------------------------------------------------------
--  D1xDO DINxDI(0))), 0) xor T256(1, to_integer(unsigned(DINxDI(1))), 0) xor T256(2, to_integer(unsigned(DINxDI(2))), 0) xor T256(3, to_integer(unsigned(DINxDI(3))), 0);
--  D2xDO DINxDI(0))), 1) xor T256(1, to_integer(unsigned(DINxDI(1))), 1) xor T256(2, to_integer(unsigned(DINxDI(2))), 1) xor T256(3, to_integer(unsigned(DINxDI(3))), 1);
--  D3xDO DINxDI(0))), 2) xor T256(1, to_integer(unsigned(DINxDI(1))), 2) xor T256(2, to_integer(unsigned(DINxDI(2))), 2) xor T256(3, to_integer(unsigned(DINxDI(3))), 2);
--  D4xDO DINxDI(0))), 3) xor T256(1, to_integer(unsigned(DINxDI(1))), 3) xor T256(2, to_integer(unsigned(DINxDI(2))), 3) xor T256(3, to_integer(unsigned(DINxDI(3))), 3);
--  D5xDO DINxDI(0))), 4) xor T256(1, to_integer(unsigned(DINxDI(1))), 4) xor T256(2, to_integer(unsigned(DINxDI(2))), 4) xor T256(3, to_integer(unsigned(DINxDI(3))), 4);
--  D6xDO DINxDI(0))), 5) xor T256(1, to_integer(unsigned(DINxDI(1))), 5) xor T256(2, to_integer(unsigned(DINxDI(2))), 5) xor T256(3, to_integer(unsigned(DINxDI(3))), 5);
--  D7xDO DINxDI(0))), 6) xor T256(1, to_integer(unsigned(DINxDI(1))), 6) xor T256(2, to_integer(unsigned(DINxDI(2))), 6) xor T256(3, to_integer(unsigned(DINxDI(3))), 6);
--  D8xDO DINxDI(0))), 7) xor T256(1, to_integer(unsigned(DINxDI(1))), 7) xor T256(2, to_integer(unsigned(DINxDI(2))), 7) xor T256(3, to_integer(unsigned(DINxDI(3))), 7);

  T0xDO <= T256(0, to_integer(unsigned(DINxDI(0))));
  T1xDO <= T256(1, to_integer(unsigned(DINxDI(0))));
  T2xDO <= T256(2, to_integer(unsigned(DINxDI(0))));
  T3xDO <= T256(3, to_integer(unsigned(DINxDI(0))));

  D1xDO <= T0xDO(0) xor T1xDO(0) xor T2xDO(0) xor T3xDO(0);
  D2xDO <= T0xDO(1) xor T1xDO(1) xor T2xDO(1) xor T3xDO(1);
  D3xDO <= T0xDO(2) xor T1xDO(2) xor T2xDO(2) xor T3xDO(2);
  D4xDO <= T0xDO(3) xor T1xDO(3) xor T2xDO(3) xor T3xDO(3);
  D5xDO <= T0xDO(4) xor T1xDO(4) xor T2xDO(4) xor T3xDO(4);
  D6xDO <= T0xDO(5) xor T1xDO(5) xor T2xDO(5) xor T3xDO(5);
  D7xDO <= T0xDO(6) xor T1xDO(6) xor T2xDO(6) xor T3xDO(6);
  D8xDO <= T0xDO(7) xor T1xDO(7) xor T2xDO(7) xor T3xDO(7);
  
end rtl;