Documentation
Packages
| cf_math_pkg | |
| cb_filter_pkg | |
| axi_pkg | Contains all necessary type definitions, constants and generally |
Modules
| cluster_clock_and2 | |
| cluster_clock_buffer | |
| cluster_clock_gating | |
| cluster_clock_inverter | |
| cluster_clock_mux2 | |
| cluster_clock_xor2 | |
| pulp_clock_and2 | |
| pulp_clock_buffer | |
| pulp_clock_gating | |
| pulp_clock_inverter | |
| pulp_clock_mux2 | |
| pulp_clock_xor2 | |
| pulp_clock_delay | |
| tc_clk_and2 | |
| tc_clk_buffer | |
| tc_clk_gating | |
| tc_clk_inverter | |
| tc_clk_mux2 | |
| tc_clk_xor2 | |
| tc_clk_delay | |
| cluster_level_shifter_in | |
| cluster_level_shifter_in_clamp | |
| cluster_level_shifter_inout | |
| cluster_level_shifter_out | |
| cluster_level_shifter_out_clamp | |
| generic_memory | |
| generic_rom | |
| pad_functional_pd | |
| pad_functional_pu | |
| pulp_buffer | |
| pulp_level_shifter_in | |
| pulp_level_shifter_in_clamp | |
| pulp_level_shifter_inout | |
| pulp_level_shifter_out | |
| pulp_level_shifter_out_clamp | |
| pulp_power_gating | |
| pulp_isolation_0 | |
| pulp_isolation_1 | |
| tc_pwr_level_shifter_in | |
| tc_pwr_level_shifter_in_clamp_lo | |
| tc_pwr_level_shifter_in_clamp_hi | |
| tc_pwr_level_shifter_out | |
| tc_pwr_level_shifter_out_clamp_lo | |
| tc_pwr_level_shifter_out_clamp_hi | |
| tc_pwr_power_gating | |
| tc_pwr_isolation_lo | |
| tc_pwr_isolation_hi | |
| addr_decode | |
| cdc_2phase | A two-phase clock domain crossing. |
| cdc_2phase_src | Half of the two-phase clock domain crossing located in the source domain. |
| cdc_2phase_dst | Half of the two-phase clock domain crossing located in the destination |
| clk_div | |
| delta_counter | |
| edge_propagator_tx | |
| exp_backoff | |
| fifo_v3 | |
| binary_to_gray | A binary to gray code converter. |
| gray_to_binary | A gray code to binary converter. |
| lfsr | |
| lfsr_16bit | |
| lfsr_8bit | |
| lzc | A trailing zero counter / leading zero counter. |
| mv_filter | |
| onehot_to_bin | |
| plru_tree | |
| popcount | |
| rr_arb_tree | |
| rstgen_bypass | |
| serial_deglitch | |
| shift_reg | |
| spill_register | A register with handshakes that completely cuts any combinational paths |
| stream_demux | Stream demultiplexer: Connects the input stream (valid-ready) handshake to one of |
| stream_filter | |
| stream_fork | |
| stream_mux | Stream multiplexer: connects the output to one of |
| sub_per_hash | |
| sync | |
| sync_wedge | |
| unread | |
| cb_filter | |
| hash_block | |
| cdc_fifo_2phase | A clock domain crossing FIFO, using 2-phase hand shakes. |
| cdc_fifo_gray | A clock domain crossing FIFO, using gray counters. |
| cdc_fifo_gray_src | |
| cdc_fifo_gray_dst | |
| counter | |
| edge_detect | |
| id_queue | |
| max_counter | |
| rstgen | |
| stream_delay | |
| fall_through_register | |
| stream_arbiter_flushable | |
| stream_register | Register with a simple stream-like ready/valid handshake. |
| stream_arbiter | |
| clock_divider_counter | ///////////////////////////////////////////////////////////////////////////// |
| find_first_one | A leading-one finder / leading zero counter. |
| generic_LFSR_8bit | |
| generic_fifo | |
| prioarbiter | |
| pulp_sync | |
| pulp_sync_wedge | |
| rrarbiter | |
| clock_divider | ///////////////////////////////////////////////////////////////////////////// |
| fifo_v2 | |
| fifo | |
| edge_propagator | |
| edge_propagator_rx | |
| axi_atop_filter | AXI Atomic Operation Filter |
| axi_atop_filter_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_burst_splitter | AXI Burst Splitter |
| axi_burst_splitter_ax_chan | Splits |
| axi_burst_splitter_counters | |
| axi_cdc | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_cdc_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_cdc_intf | |
| axi_cut | An AXI4 cut. |
| axi_cut_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_cut_intf | |
| axi_delayer | |
| axi_delayer_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_demux | |
| axi_demux_id_counters | |
| axi_demux_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_id_prepend | |
| axi_join_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_demux | |
| axi_lite_demux_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_join_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_mailbox | |
| axi_lite_mailbox_slave | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_mailbox_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_mux | |
| axi_lite_mux_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_to_apb | |
| axi_lite_to_apb_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_to_axi | An AXI4-Lite to AXI4 adapter. |
| axi_lite_to_axi_intf | |
| axi_modify_address | |
| axi_modify_address_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_mux | |
| axi_mux_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_err_slv | |
| axi_multicut | |
| axi_multicut_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_multicut_intf | |
| axi_to_axi_lite | |
| axi_to_axi_lite_id_reflect | |
| axi_to_axi_lite_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_lite_xbar | ///////////////////////////////////////////////////////////////////////////////////////////////// |
| axi_xbar | |
| axi_xbar_intf | ///////////////////////////////////////////////////////////////////////////////////////////////// |
Parameters
AXI_ADDR_WIDTH
AXI_DATA_WIDTH
AXI_ID_WIDTH
AXI_USER_WIDTH
AXI_STRB_WIDTH
AXI_ADDR_WIDTH
AXI_DATA_WIDTH
AXI_ID_WIDTH
AXI_USER_WIDTH
AXI_STRB_WIDTH
AXI_ADDR_WIDTH
AXI_DATA_WIDTH
AXI_ID_WIDTH
AXI_USER_WIDTH
BUFFER_WIDTH
AXI_STRB_WIDTH
AXI_ADDR_WIDTH
AXI_DATA_WIDTH
AXI_STRB_WIDTH
AXI_ADDR_WIDTH
AXI_DATA_WIDTH
AXI_STRB_WIDTH
Ports
clk_i
clk_i
Types
| id_t | |
| addr_t | |
| data_t | |
| strb_t | |
| user_t | |
| id_t | |
| addr_t | |
| data_t | |
| strb_t | |
| user_t | |
| id_t | |
| addr_t | |
| data_t | |
| strb_t | |
| user_t | |
| buffer_t | |
| addr_t | |
| data_t | |
| strb_t | |
| addr_t | |
| data_t | |
| strb_t |